CS 3853 Computer Architecture Recitation 6 Answers Fall 2013

Quiz 4a

  1. The cache miss penalty is the number of extra cycles needed during a cache miss.
  2. CPI = 1 + 1.4 × .05 × 35 = 1 + 2.45 = 3.45.
    It is 3.45 times as fast or 245% faster.
  3. Number of blocks = 28 × 210 / 27 = 211.
    Number of sets = 211/4 = 29. 
                     20 bits         9 bits  7 bits
           -------------------------------------
          |        tag         |  index  |offset|
           -------------------------------------
          <-- block address (29 bits) -->

Quiz 4b

  1. The cache miss penalty is the number of extra cycles needed during a cache miss.
  2. CPI = 1 + 1.5 × .03 × 20 = 1 + .9 = 1.9.
    It is 1.9 times as fast or 90% faster.
  3. Number of blocks = 27 × 210 / 25 = 212.
    Number of sets = 212/2 = 211. 
                     22 bits         11 bits  5 bits
           -------------------------------------
          |        tag         |  index  |offset|
           -------------------------------------
          <-- block address (33 bits) -->

Problems

    1. CPI = 1 + .25 × .30 × 10 = 1 + .75 = 1.75
    2. CPI = 1 + .1 × 10 = 2
    3. CPI = 1 + .1 × 10 + .25 × .30 × 10 = 2.75
  2. Improving the instruction cache hit ratio to 90%: CPI = 1 + .05 × 10 + .25 × .30 × 10 = 2.25
    Improving the data cache hit ratio to 85%: CPI = 1 + .1 × 10 + .15 × .30 × 10 = 2.45
    Improving the instruction cache hit ratio is better.
  3. 128 = 27 so the block offset has 7 bits.
    The tag + index will be 50 - 7 = 43 bits.
    The number of blocks is 32K/128 = 28.
    1. There are 28 sets so the index is 8 bits and the tag is 43-8=35 bits.
    2. There are 27 sets so the index is 7 bits and the tag is 36 bits.
    3. There are 26 sets so the index is 6 bits and the tag is 37 bits.
    4. There is only 1 set, so the index is 0 bits and the tag is 43 bits.